Company Description

Synaptics is the leading worldwide developer of user interface solutions for mobile computing, communications and entertainment devices. Our mission is to enrich the interaction between users and their intelligent devices. Synaptics products emphasize ease of use, small size, low power consumption, advanced functionality, durability and reliability, making them applicable to a multitude of markets, including notebook computers, PC peripherals, mobile phones, and portable entertainment devices such as MP3 players.

Job Responsibilities

The IC Design team is searching for a hands-on, team oriented, IC physical design engineer with strong digital design, synthesis, place and route and static timing expertise. In this role, you will be responsible for the backend Place&Route and  timing closure of highly integrated, mixed-signal integrated circuits that implement innovative capacitive and other touch sensing technologies. You should have good knowledge of RTL coding using Verilog, logic synthesis, timing analysis, place & route and physical verification.

Responsibilities include:

·       Detailed floor planning, place and route, static timing analysis and physical verification for digital sub-systems of system-on-a-chip (SOC) ICs.

·       Work closely with Digital Design Team on constraints for place & route and timing closure.

·       Schedule tasks and goals to complete designs on time that meet all specifications

Required Qualifications

Desired Qualifications

·         Experience with Apache-Totem Power analysis tools is big plus.

·         A good understanding of testability and design-for-test (DFT), ATPG, BIST is a plus.