|
• MSEE/PhD with a focus on CMOS transistor-level design and 4+ years of professional experience
• Experience in Communication theory and systems, circuits and noise analysis a plus
• Discrete time and continuous time signal processing skills
• Experience in mentoring layout techniques for low offset, and critical device matching
• Experience in a rigorous Design Verification methodology that makes use of digital and mixed-signal behavioral models for as well as focused mixed-signal verification in a self-checking, regression-based environment
• Experience in design of deep sub-micron (65nm and below) analog circuit design
• Excellent organizational skills and strong attention to detail
• Ability to handle multiple tasks and projects simultaneously
• Ability to successfully anticipate issues or challenges without being specifically directed
• Ability to manage multiple-step procedures and handle frequent interruptions in work flow
• Approachable, honest, high personal integrity
• Passionate about technology and teamwork
• Collaborative style; openly discusses and works to solve problems the best way for the company
• Customer and Partner oriented
• Disciplined and accountable (takes ownership)
|